1. Technical Field
The present invention relates to a keyboard technology. More particularly, the present invention relates to a membrane keyboard scan circuit, a scan method for the membrane keyboard scan circuit, and a keyboard including the membrane keyboard scan circuit.
2. Description of Related Art
The membrane keyboard is a common computer keyboard in use today. The structure of the membrane keyboard is simple. In addition to a top cover, a down cover and keycaps, the membrane keyboard includes rubber domes, three membrane circuit boards and a chip on the circuit boards. The membrane circuit boards have conductive paste formed thereon. The top layer of the membrane circuit boards is one end of a switch, the bottom layer is the other end of the switch and the middle layer is a non-conductive plastic membrane having a plurality of round holes corresponding to the positions of the keys. When the keyboard is in use, a plurality of pressing modules (including keycaps, movable modules under the keycaps and rubber domes) are placed on the membrane circuit boards. When a finger presses one of the keycaps, the top layer and the bottom layer can conduct electricity since they contact each other to make the switch close. When the finger leaves the keycaps, the top layer and the bottom layer are separated such that the switch is open.
FIG. 1A is a schematic diagram of a conventional keyboard scan matrix 10. FIG. 1B is a schematic diagram depicting the conventional keyboard scan matrix 10 connected to a keyboard control chip 12 and a host 14.
The keyboard control chip 12 on the membrane circuit board performs a scan process to detect whether the keys are operated. The working voltage of the keyboard control chip 12 is generally 5V. After the chip detects that a key is operated through the scanning process, the chip transmits a corresponding encoded signal to the host 14. There are generally 18 column scan-ports (C0-C17) and 8 row scan-ports (P0-P7) in a common keyboard control chip 12. The manner in which the ports are connected to the keyboard scan matrix 10 and the chip keyboard control 12 is shown in FIG. 1B.
FIG. 2 is a scan timing diagram of the column scan-ports (C0-C17) depicted in FIG. 1A. FIG. 3 is a conventional circuit diagram of one of the column scan-ports (C0-C17). Each of the column scan-ports (C0-C17) is a bi-directional input/output port 3 having a pull-up resistor 30. A control signal is transmitted from the keyboard control chip 12 depicted in FIG. 1B to point I1, and a column scan timing is generated at point O1. When the keyboard control chip 12 is in operation, each of the 18 column scan-ports outputs a low voltage level in turn, as shown in FIG. 2. When the scan process is performed, the bi-directional input/output 3 output a low voltage level and a high impedance state. For example, the column scan-port C0 outputs low voltage level in time period T1 and outputs high impedance state in time period T2. The column scan-port C1 outputs low voltage level in time period T2 and outputs high impedance state in time period T3. When the high impedance state is output, a high voltage level is generated from the bi-directional input/output port 3 through the use of the pull-up resistor 30.
FIG. 4 is a conventional circuit diagram of one of the row scan-ports (P0-P17). Each of the 8 row scan-ports (P0-P17) is an input port 4 comprising a pull-up resistor R1 and an input voltage control W1. If one of the keys of the key circuit (S1-S144) in the keyboard scan matrix 10 is operated, a corresponding one of the row scan-ports (P0-P7) receives a corresponding low voltage level generated from the operated key. As a result, the keyboard control chip 12 can determine that the key has been operated in accordance to reception of the low voltage level of the row scan-port. A signal generated by the key circuit (S1-S144) is transmitted to point 12 of the input port 4. An output signal is generated at point O2 and is further transmitted to the host depicted in FIG. 1B after encoding. The resistance of the pull-up resistor R1 is about 10K Ohm to 50K Ohm. Generally, the effective input low voltage level of the input port 4 is 1V and the effective input high voltage is 2V. The input voltage level control circuit W1 can be implemented by a Schmitt circuit.
In order to lower the manufacturing cost of the keyboard, a carbon paste membrane is used since it is lower in cost than a silver paste membrane. However, the resistance of scan lines when a carbon paste membrane is used is larger than the resistance of scan lines when a silver paste membrane is used. In particular, the resistance of the scan lines when a silver paste membrane is used is generally less than 5K Ohm while the resistance of the scan lines is over 200K Ohm when a carbon paste membrane is used. Hence, the scan-port circuit and method adapted for use with the conventional silver paste membrane keyboard is not suitable for use with the carbon paste membrane keyboard.